| Class | Description |
|---|---|
| AMD64Address |
Represents an address in target machine memory, specified via some combination of a base
register, an index register, a displacement and a scale.
|
| AMD64AsmOptions | |
| AMD64Assembler |
This class implements an assembler that can encode most X86 instructions.
|
| AMD64Assembler.AMD64BinaryArithmetic |
Arithmetic operation with operand order of RM, MR or MI.
|
| AMD64Assembler.AMD64ImmOp |
Base class for AMD64 opcodes with immediate operands.
|
| AMD64Assembler.AMD64MIOp |
Opcodes with operand order of MI.
|
| AMD64Assembler.AMD64MOp |
Opcodes with operand order of M.
|
| AMD64Assembler.AMD64MROp |
Opcode with operand order of MR.
|
| AMD64Assembler.AMD64Op |
Base class for AMD64 opcodes.
|
| AMD64Assembler.AMD64RMIOp |
Opcodes with operand order of RMI.
|
| AMD64Assembler.AMD64RMOp |
Opcode with operand order of RM.
|
| AMD64Assembler.AMD64RROp |
Opcode with operand order of either RM or MR.
|
| AMD64Assembler.AMD64Shift |
Shift operation with operand order of M1, MC or MI.
|
| AMD64Assembler.Prefix |
Constants for X86 prefix bytes.
|
| AMD64Assembler.SSEOp | |
| AMD64MacroAssembler |
This class implements commonly used X86 code patterns.
|
| Enum | Description |
|---|---|
| AMD64Address.Scale |
A scaling factor used in the SIB addressing mode.
|
| AMD64Assembler.ConditionFlag |
The x86 condition codes used for conditional jumps/moves.
|
| AMD64Assembler.OpAssertion |
Operand size and register type constraints.
|
| AMD64Assembler.OperandSize |
The x86 operand sizes.
|